SUNNYVALE, CA--(Marketwired - Mar 13, 2017) - QuickLogic Corporation (
The Aurora eFPGA development tool supports complete design implementation from RTL through place and route, allowing SoC developers to determine the amount of eFPGA resources needed to support their design (including logic cell count, clock network requirements, and routing utilization) and also provides the estimated eFPGA die area associated with those resources. The current version of the tool supports GF's 40nm node; with support for the 65nm node and 22FDX® (FD-SOI) platform coming in a future release.
"We have moved very quickly to provide tangible support of the ArcticPro™ eFPGA initiative we announced at the end of November," said Mao Wang, director of product marketing at QuickLogic Corporation. "With this release of the Aurora eFPGA development tools, SoC developers can begin exploring the amount of eFPGA resources required to support their design requirements, and estimate the die area required."
"QuickLogic is delivering the first critical tool needed to support eFPGA integration for SoCs manufactured on our processes," said Alain Mutricy, senior vice president of product management at GF. "This software, along with the rest of the eFPGA initiative, will enable a high degree of post-production design flexibility for a wide range of SoC applications."
The Aurora eFPGA development tool is available now. Interested customers should contact eFPGA@quicklogic.com and complete an evaluation agreement to get access to the tools.
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